The present invention relates to semiconductor resistors of the type typically used in random access memories. More particularly, the present invention is concerned with a method for the fabrication of polysilicon resistors with low thermal activation energy. Resistors of this type are disclosed in Bourassa, "Polysilicon Resistor With Low Thermal Activation Energy," filed in the U.S. Patent Office on Dec. 15, 1982 having Ser. No. 449,984, whose disclosure is hereby incorporated hereto.
The prior Bourassa patent application disclosed a polysilicon resistor illustratively having the form of a polysilicon structure separated from the substrate by an insulator or dielectric. The poly structure has a central portion doped with P type impurity having beside it regions doped with N type impurity, the dopiings being such that the thermal activation energy is below about 0.5 electron volts. It was further disclosed that the middle region could be doped with both P type and N type impurities. Of course, the resistor could be formed with P type regions on the outside and an N type region on the inside. It was found that the low thermal activation energy permitted the construction of a polysilicon device within the desired resistance range at normal operating temperatures, but the resistor would be able to mask appreciable leakage current even at low temperatures, without the disadvantage of drawing excessive current at high temperatures. The typical resistance for load resistors in static RAMS is approximately 0.1 to 50 gigaohms.
The present invention is concerned with a method for fabricating resistances suitable for use as load devices in static RAMS, for example. The prior Bourassa application disclosed methods of fabricating such devices, but did not disclose the present invention herein. Briefly, the prior Bourassa patent application set forth at least three methods for making the resistors there disclosed. The first method was to obtain a field oxide on top of a silicon substrate, depositing polysilicon over the insulating layer, doping the polysilicon uniformly with N type dopant at a concentration of up to about 10.sup.20 per cubic centimeter, then doping the polysilicon uniformly with P type dopant of equal or greater concentration but not less than 10.sup.18 per cubic centimeter. The next step described was to mask the resistor area and then dope the unmasked portion of the polysilicon with N type dopant at a concentration greater than the P type dopant.
The second method disclosed in the prior patent application also obtains a polysilicon layer separated from a monocrystalline silicon substrate layer by an insulating layer. Next, the resistor area is masked and the remaining polysilicon is doped with N type dopant at a concentration up to about 10.sup.21 per cubic centimeter. Next, the entire poly area is masked except for the resistor area which is then doped with N type impurity at a concentration of up to about 10.sup.20 per cubic centimeter. Next, with the mask still in place, the resistor area is doped with P type impurity at a concentration of between about 10.sup.18 and 10.sup.20 per cubic centimeter (but greater than or equal to the concentration of N type dopant which the resistor area was doped).
The third method disclosed in the prior Bourassa patent application is to obtain a polysilicon layer upon an insulating layer upon a silicon substrate. Next the polysilicon is doped uniformly with N type impurities at a concentration of up to about 10.sup.20 per cubic centimeter. After etching the poly lines, the entire circuit except for the resistor area is masked so that the resistor area can be doped with P type impurities at a concentration exceeding the concentration of the N type impurities.
Those methods resulted in the formation of a polysilicon resistor having a thermal activation energy in the range of about 0.1 to about 0.35 electron volts, which is considerably more effective than the activation energy of 0.5 to about 0.6 electron volts for normal polysilicon resistors. The advantage of such a structure is that such improved polysilicon resistors can tolerate more leakage at cold temperatures without reducing the voltage at the memory cell node so much that the memory cell would change state, while still staying within maximum current limits at high temperatures. Additionally, the sensitivity of the resistor to dopant concentration is drastically reduced, viz. from 5.3 decades per decade (resistance versus dopant concentration) down to 0.2 decades per decade. Other advantages are described in the prior Bourassa patent application.
The present invention relates to a further processing step involved in the fabrication of polysilicon resistors. Herein, the expression "diode" or "diodes" is occasionally used to mean a polysilicon resistance. This is because the resulting structure, considering the doping and configurations thereof, electrically resembles back-to-back diodes.